19#ifndef _CH32V003_SWIO_H
20#define _CH32V003_SWIO_H
61#define STTAG(x) (*((uint32_t*)(x)))
66static inline void Send1BitSWIO(
int t1coeff,
int pinmaskD)
IRAM;
67static inline void Send0BitSWIO(
int t1coeff,
int pinmaskD)
IRAM;
69static inline void SendBitRVSWD(
int t1coeff,
int pinmaskD,
int pinmaskC,
int val)
IRAM;
70static inline int ReadBitRVSWD(
int t1coeff,
int pinmaskD,
int pinmaskC)
IRAM;
73static void MCFWriteReg32(
struct SWIOState* state, uint8_t command, uint32_t value)
IRAM;
74static int MCFReadReg32(
struct SWIOState* state, uint8_t command, uint32_t* value)
IRAM;
77static int InitializeSWDSWIO(
struct SWIOState* state);
78static int ReadWord(
struct SWIOState* state, uint32_t word, uint32_t* ret);
79static int WriteWord(
struct SWIOState* state, uint32_t word, uint32_t val);
80static int WaitForFlash(
struct SWIOState* state);
81static int WaitForDoneOp(
struct SWIOState* state);
82static int Write64Block(
struct SWIOState* iss, uint32_t address_to_write,
const uint8_t* data);
83static int UnlockFlash(
struct SWIOState* iss);
84static int EraseFlash(
struct SWIOState* iss, uint32_t address, uint32_t length,
int type);
85static void ResetInternalProgrammingState(
struct SWIOState* iss);
86static int PollTerminal(
struct SWIOState* iss, uint8_t* buffer,
int maxlen, uint32_t leavevalA, uint32_t leavevalB);
92#define DMHARTINFO 0x12
93#define DMABSTRACTCS 0x16
95#define DMABSTRACTAUTO 0x18
96#define DMPROGBUF0 0x20
97#define DMPROGBUF1 0x21
98#define DMPROGBUF2 0x22
99#define DMPROGBUF3 0x23
100#define DMPROGBUF4 0x24
101#define DMPROGBUF5 0x25
102#define DMPROGBUF6 0x26
103#define DMPROGBUF7 0x27
107#define DMSHDWCFGR 0x7E
109#define FLASH_STATR_WRPRTERR ((uint8_t)0x10)
110#define CR_PAGE_PG ((uint32_t)0x00010000)
111#define CR_BUF_LOAD ((uint32_t)0x00040000)
112#define FLASH_CTLR_MER ((uint16_t)0x0004)
113#define CR_STRT_Set ((uint32_t)0x00000040)
114#define CR_PAGE_ER ((uint32_t)0x00020000)
115#define CR_BUF_RST ((uint32_t)0x00080000)
117static inline void PrecDelay(
int delay)
119 asm volatile(
"1: addi %[delay], %[delay], -1\n"
120 " bbci %[delay], 31, 1b\n"
121 : [delay]
"+r"(delay));
132static inline void Send1BitSWIO(
int t1coeff,
int pinmaskD)
140 PrecDelay(t1coeff + 1);
143static inline void Send0BitSWIO(
int t1coeff,
int pinmaskD)
147 int longwait = t1coeff * 4;
149 PrecDelay(longwait + 2);
151 PrecDelay(t1coeff + 1);
157static inline int ReadBitSWIO(
struct SWIOState* state)
167 int medwait = t1coeff * 2;
173 int halfwait = t1coeff / 2;
174 PrecDelay(halfwait - 3);
177 PrecDelay(halfwait + 1);
184 if (!(ret & pinmaskD))
197 int fastwait = t1coeff / 2;
199 return !!(ret & pinmaskD);
208static inline void SendBitRVSWD(
int t1coeff,
int pinmaskD,
int pinmaskC,
int val)
224static inline int ReadBitRVSWD(
int t1coeff,
int pinmaskD,
int pinmaskC)
236static void MCFWriteReg32(
struct SWIOState* state, uint8_t command, uint32_t value)
249 Send1BitSWIO(t1coeff, pinmaskD);
251 for (mask = 1 << 6; mask; mask >>= 1)
254 Send1BitSWIO(t1coeff, pinmaskD);
256 Send0BitSWIO(t1coeff, pinmaskD);
258 Send1BitSWIO(t1coeff, pinmaskD);
259 for (mask = 1 << 31; mask; mask >>= 1)
262 Send1BitSWIO(t1coeff, pinmaskD);
264 Send0BitSWIO(t1coeff, pinmaskD);
276 for (mask = 1 << 6; mask; mask >>= 1)
278 int v = !!(command & mask);
280 SendBitRVSWD(t1coeff, pinmaskD, pinmaskC, v);
282 SendBitRVSWD(t1coeff, pinmaskD, pinmaskC, 1);
283 SendBitRVSWD(t1coeff, pinmaskD, pinmaskC, parity);
284 ReadBitRVSWD(t1coeff, pinmaskD, pinmaskC);
285 ReadBitRVSWD(t1coeff, pinmaskD,
287 ReadBitRVSWD(t1coeff, pinmaskD, pinmaskC);
288 SendBitRVSWD(t1coeff, pinmaskD, pinmaskC, 0);
289 SendBitRVSWD(t1coeff, pinmaskD, pinmaskC, 0);
292 for (mask = 1 << 31; mask; mask >>= 1)
294 int v = !!(value & mask);
296 SendBitRVSWD(t1coeff, pinmaskD, pinmaskC, v);
298 SendBitRVSWD(t1coeff, pinmaskD, pinmaskC, parity);
299 ReadBitRVSWD(t1coeff, pinmaskD, pinmaskC);
300 ReadBitRVSWD(t1coeff, pinmaskD, pinmaskC);
301 ReadBitRVSWD(t1coeff, pinmaskD, pinmaskC);
302 SendBitRVSWD(t1coeff, pinmaskD, pinmaskC, 1);
303 SendBitRVSWD(t1coeff, pinmaskD, pinmaskC, 0);
320static int MCFReadReg32(
struct SWIOState* state, uint8_t command, uint32_t* value)
333 Send1BitSWIO(t1coeff, pinmaskD);
336 for (mask = 1 << 6; mask; mask >>= 1)
339 Send1BitSWIO(t1coeff, pinmaskD);
341 Send0BitSWIO(t1coeff, pinmaskD);
343 Send0BitSWIO(t1coeff, pinmaskD);
345 for (i = 0; i < 32; i++)
348 int r = ReadBitSWIO(state);
368 for (mask = 1 << 6; mask; mask >>= 1)
370 int v = !!(command & mask);
372 SendBitRVSWD(t1coeff, pinmaskD, pinmaskC, v);
374 SendBitRVSWD(t1coeff, pinmaskD, pinmaskC, 0);
375 SendBitRVSWD(t1coeff, pinmaskD, pinmaskC, parity);
376 ReadBitRVSWD(t1coeff, pinmaskD, pinmaskC);
377 ReadBitRVSWD(t1coeff, pinmaskD, pinmaskC);
378 ReadBitRVSWD(t1coeff, pinmaskD, pinmaskC);
379 SendBitRVSWD(t1coeff, pinmaskD, pinmaskC, 0);
380 SendBitRVSWD(t1coeff, pinmaskD, pinmaskC, 0);
385 for (i = 0; i < 32; i++)
388 int r = ReadBitRVSWD(t1coeff, pinmaskD, pinmaskC);
402 if (ReadBitRVSWD(t1coeff, pinmaskD, pinmaskC) != parity)
409 ReadBitRVSWD(t1coeff, pinmaskD, pinmaskC);
410 ReadBitRVSWD(t1coeff, pinmaskD, pinmaskC);
411 ReadBitRVSWD(t1coeff, pinmaskD, pinmaskC);
412 SendBitRVSWD(t1coeff, pinmaskD, pinmaskC, 1);
413 SendBitRVSWD(t1coeff, pinmaskD, pinmaskC, 0);
434static int InitializeSWDSWIO(
struct SWIOState* state)
440 MCFWriteReg32(state,
DMSHDWCFGR, 0x5aa50000 | (1 << 10));
441 MCFWriteReg32(state,
DMCFGR, 0x5aa50000 | (1 << 10));
442 MCFWriteReg32(state,
DMSHDWCFGR, 0x5aa50000 | (1 << 10));
443 MCFWriteReg32(state,
DMCFGR, 0x5aa50000 | (1 << 10));
445 MCFWriteReg32(state,
DMCONTROL, 0x00000001);
446 MCFWriteReg32(state,
DMCONTROL, 0x00000001);
450 int readdm = MCFReadReg32(state,
DMCFGR, &value);
451 uprintf(
"DMCFGR (SWD): %d: %08x\n", (
int)readdm, (
unsigned)value);
452 if (readdm == 0 && (value & 0xffff0000) == (0x5aa50000))
454 uprintf(
"TEST: Read reg passed. Check value: %08x TODO: MAKE SURE THESE MATCH\n", (
unsigned)value);
464 MCFWriteReg32(state,
DMCONTROL, 0x00000001);
465 MCFWriteReg32(state,
DMCONTROL, 0x00000001);
467 uint32_t dmstatus, dmcontrol;
468 if (MCFReadReg32(state,
DMSTATUS, &dmstatus) != 0 || MCFReadReg32(state,
DMCONTROL, &dmcontrol) != 0)
470 uprintf(
"Could not read from RVSWD connection\n");
475 uprintf(
"DMSTATUS: %08x\n", (
unsigned)dmstatus);
476 uprintf(
"DMCONTROL: %08x\n", (
unsigned)dmcontrol);
478 if ((((dmstatus >> 8) & 0xf) != 0x0c && ((dmstatus >> 8) & 0xf) != 0x03) || dmcontrol != 1)
480 uprintf(
"DMSTATUS invalid (Probably no RVSWD chip)\n");
485 uprintf(
"Found RVSWD interface\n");
490static int DetermineChipTypeAndSectorInfo(
struct SWIOState* iss)
497 uprintf(
"Error: Could not get hart info.\n");
501 uint32_t data0offset = 0xe0000000 | (rr & 0x7ff);
503 MCFWriteReg32(iss,
DMCONTROL, 0x80000001);
504 MCFWriteReg32(iss,
DMCONTROL, 0x80000001);
508 MCFReadReg32(iss,
DMDATA0, &old_data0);
509 MCFWriteReg32(iss,
DMCOMMAND, 0x00221008);
511 MCFReadReg32(iss,
DMDATA0, &old_x8);
513 uint32_t vendorid = 0;
514 uint32_t marchid = 0;
519 MCFWriteReg32(iss,
DMCOMMAND, 0x00220000 | 0xf12);
520 MCFWriteReg32(iss,
DMCOMMAND, 0x00220000 | 0xf12);
521 MCFReadReg32(iss,
DMDATA0, &marchid);
524 MCFWriteReg32(iss,
DMDATA0, 0x1ffff704);
525 MCFWriteReg32(iss,
DMCOMMAND, 0x00271008);
528 MCFWriteReg32(iss,
DMCOMMAND, 0x00221008);
529 MCFReadReg32(iss,
DMDATA0, &vendorid);
532 MCFWriteReg32(iss,
DMDATA0, old_x8);
533 MCFWriteReg32(iss,
DMCOMMAND, 0x00231008);
534 MCFWriteReg32(iss,
DMDATA0, old_data0);
536 if (data0offset == 0xe00000f4)
542 else if (data0offset == 0xe0000380)
545 uint32_t chip_type = (vendorid & 0xfff00000) >> 20;
572 uprintf(
"Vendored: %08x\n", (
unsigned)vendorid);
573 uprintf(
"marchid : %08x\n", (
unsigned)marchid);
574 uprintf(
"HARTINFO: %08x\n", (
unsigned)rr);
581static int WaitForFlash(
struct SWIOState* iss)
585 if (DetermineChipTypeAndSectorInfo(iss))
588 uint32_t rw, timeout = 0;
592 ReadWord(dev, 0x4002200C, &rw);
593 }
while ((rw & 1) && timeout++ < 200);
595 WriteWord(dev, 0x4002200C, 0);
606static int WaitForDoneOp(
struct SWIOState* iss)
617 }
while (rrv & (1 << 12));
626static void StaticUpdatePROGBUFRegs(
struct SWIOState* dev)
628 if (DetermineChipTypeAndSectorInfo(dev))
632 MCFWriteReg32(dev,
DMDATA0, 0xe00000f4);
633 MCFWriteReg32(dev,
DMCOMMAND, 0x0023100a);
634 MCFWriteReg32(dev,
DMDATA0, 0xe00000f8);
635 MCFWriteReg32(dev,
DMCOMMAND, 0x0023100b);
636 MCFWriteReg32(dev,
DMDATA0, 0x40022010);
637 MCFWriteReg32(dev,
DMCOMMAND, 0x0023100c);
642 MCFWriteReg32(dev,
DMDATA0, 0x00010000);
649 0x00010000 | 0x00040000);
651 MCFWriteReg32(dev,
DMCOMMAND, 0x0023100d);
654static void ResetInternalProgrammingState(
struct SWIOState* iss)
663static int ReadWord(
struct SWIOState* iss, uint32_t address_to_read, uint32_t* data)
667 if (address_to_read == 0x40022010 || address_to_read == 0x4002200C)
677 StaticUpdatePROGBUFRegs(dev);
707 MCFWriteReg32(dev,
DMDATA1, address_to_read);
708 MCFWriteReg32(dev,
DMCOMMAND, 0x00240000);
719 int r = MCFReadReg32(dev,
DMDATA0, data);
724static int WriteWord(
struct SWIOState* iss, uint32_t address_to_write, uint32_t data)
731 if ((address_to_write & 0xff000000) == 0x08000000 || (address_to_write & 0x1FFFF800) == 0x1FFFF000)
739 int did_disable_req = 0;
744 StaticUpdatePROGBUFRegs(dev);
774 MCFWriteReg32(dev,
DMDATA1, address_to_write);
775 MCFWriteReg32(dev,
DMDATA0, data);
779 MCFWriteReg32(dev,
DMCOMMAND, 0x00271008);
788 ret |= WaitForDoneOp(dev);
795 MCFWriteReg32(dev,
DMDATA1, address_to_write);
798 MCFWriteReg32(dev,
DMDATA0, data);
803 ret |= WaitForDoneOp(dev);
807 ret |= WaitForDoneOp(dev);
816static int UnlockFlash(
struct SWIOState* iss)
820 if (DetermineChipTypeAndSectorInfo(iss))
824 ReadWord(dev, 0x40022010, &rw);
827 WriteWord(dev, 0x40022004, 0x45670123);
828 WriteWord(dev, 0x40022004, 0xCDEF89AB);
829 WriteWord(dev, 0x40022008, 0x45670123);
830 WriteWord(dev, 0x40022008, 0xCDEF89AB);
831 WriteWord(dev, 0x40022024, 0x45670123);
832 WriteWord(dev, 0x40022024, 0xCDEF89AB);
834 ReadWord(dev, 0x40022010, &rw);
844static int EraseFlash(
struct SWIOState* iss, uint32_t address, uint32_t length,
int type)
852 if ((rw = UnlockFlash(iss)))
860 printf(
"Whole-chip erase\n");
861 WriteWord(dev, 0x40022010, 0);
864 if (WaitForFlash(dev))
866 WriteWord(dev, 0x40022010, 0);
873 int chunk_to_erase = address;
875 while (chunk_to_erase < address + length)
877 if (WaitForFlash(dev))
884 WriteWord(dev, 0x40022014, chunk_to_erase);
888 if (WaitForFlash(dev))
891 WriteWord(dev, 0x40022010, 0);
892 chunk_to_erase += 64;
898static int Write64Block(
struct SWIOState* iss, uint32_t address_to_write,
const uint8_t* blob)
902 if (DetermineChipTypeAndSectorInfo(iss))
905 const int blob_size = 64;
906 uint32_t wp = address_to_write;
907 uint32_t ew = wp + blob_size;
912 if ((address_to_write & 0xff000000) == 0x08000000 || (address_to_write & 0xff000000) == 0x00000000
913 || (address_to_write & 0x1FFFF800) == 0x1FFFF000)
922 if ((rw = UnlockFlash(dev)))
927 rw = EraseFlash(dev, address_to_write, blob_size, 0);
944 group = (wp & 0xffffffc0);
946 int block_in_sector = (group & (iss->
sectorsize - 1)) / blob_size;
947 int is_first_block = block_in_sector == 0;
948 int is_last_block = block_in_sector == (iss->
sectorsize / blob_size - 1);
968 for (j = 0; j < 16; j++)
970 int index = (wp - address_to_write);
971 uint32_t data = 0xffffffff;
972 if (index + 3 < blob_size)
973 data = ((uint32_t*)blob)[index / 4];
974 else if ((int32_t)(blob_size - index) > 0)
976 memcpy(&data, &blob[index], blob_size - index);
978 WriteWord(dev, wp, data);
987 WriteWord(dev, 0x40022010, 1 << 21);
991 WriteWord(dev, 0x40022014, group);
997 if ((rw = WaitForFlash(dev)))
1003 int index = (wp - address_to_write);
1004 uint32_t data = 0xffffffff;
1005 if (index + 3 < blob_size)
1006 data = ((uint32_t*)blob)[index / 4];
1007 else if ((int32_t)(blob_size - index) > 0)
1008 memcpy(&data, &blob[index], blob_size - index);
1009 WriteWord(dev, wp, data);
1018static int PollTerminal(
struct SWIOState* iss, uint8_t* buffer,
int maxlen, uint32_t leavevalA, uint32_t leavevalB)
1029 r = MCFReadReg32(dev,
DMDATA0, &rr);
1041 int num_printf_chars = (rr & 0xf) - 4;
1043 if (num_printf_chars > 0 && num_printf_chars <= 7)
1045 if (num_printf_chars > 3)
1048 r = MCFReadReg32(dev,
DMDATA1, &r2);
1049 memcpy(buffer + 3, &r2, num_printf_chars - 3);
1051 int firstrem = num_printf_chars;
1054 memcpy(buffer, ((uint8_t*)&rr) + 1, firstrem);
1055 buffer[num_printf_chars] = 0;
1056 ret = num_printf_chars;
1060 MCFWriteReg32(dev,
DMDATA1, leavevalB);
1062 MCFWriteReg32(dev,
DMDATA0, leavevalA);
uint32_t autoincrement
Definition ch32v003_swio.h:58
#define DMCOMMAND
Definition ch32v003_swio.h:94
#define CR_STRT_Set
Definition ch32v003_swio.h:113
#define FLASH_CTLR_MER
Definition ch32v003_swio.h:112
#define DMDATA1
Definition ch32v003_swio.h:89
int sectorsize
Definition ch32v003_swio.h:51
RiscVChip
Definition ch32v003_swio.h:31
@ CHIP_CH32V30x
Definition ch32v003_swio.h:37
@ CHIP_CH32V10x
Definition ch32v003_swio.h:33
@ CHIP_CH32V20x
Definition ch32v003_swio.h:36
@ CHIP_CH56x
Definition ch32v003_swio.h:35
@ CHIP_CH58x
Definition ch32v003_swio.h:38
@ CHIP_CH57x
Definition ch32v003_swio.h:34
@ CHIP_CH32X03x
Definition ch32v003_swio.h:40
@ CHIP_UNKNOWN
Definition ch32v003_swio.h:32
@ CHIP_CH32V003
Definition ch32v003_swio.h:39
#define FLASH_STATR_WRPRTERR
Definition ch32v003_swio.h:109
#define DMHARTINFO
Definition ch32v003_swio.h:92
uint32_t currentstateval
Definition ch32v003_swio.h:56
#define CR_PAGE_PG
Definition ch32v003_swio.h:110
#define DMCONTROL
Definition ch32v003_swio.h:90
int pinmaskC
Definition ch32v003_swio.h:48
#define DMPROGBUF2
Definition ch32v003_swio.h:98
uint32_t flash_unlocked
Definition ch32v003_swio.h:57
#define DMSTATUS
Definition ch32v003_swio.h:91
enum RiscVChip target_chip_type
Definition ch32v003_swio.h:50
int pinmaskD
Definition ch32v003_swio.h:47
uint32_t statetag
Definition ch32v003_swio.h:54
uint32_t lastwriteflags
Definition ch32v003_swio.h:55
#define CR_BUF_RST
Definition ch32v003_swio.h:115
#define DMPROGBUF0
Definition ch32v003_swio.h:96
#define CR_PAGE_ER
Definition ch32v003_swio.h:114
#define DMABSTRACTAUTO
Definition ch32v003_swio.h:95
#define DMABSTRACTCS
Definition ch32v003_swio.h:93
#define DMPROGBUF1
Definition ch32v003_swio.h:97
#define DMSHDWCFGR
Definition ch32v003_swio.h:107
#define DMDATA0
Definition ch32v003_swio.h:88
#define IRAM
Definition ch32v003_swio.h:63
#define DMCFGR
Definition ch32v003_swio.h:106
int opmode
Definition ch32v003_swio.h:49
#define STTAG(x)
Definition ch32v003_swio.h:61
int t1coeff
Definition ch32v003_swio.h:46
Definition ch32v003_swio.h:44
#define GPIO_VAR_ENABLE_W1TC
Definition hdw-ch32v003.c:38
#define EnableISR()
Definition hdw-ch32v003.c:27
#define MAX_IN_TIMEOUT
Definition hdw-ch32v003.c:20
#define GPIO_VAR_W1TS
Definition hdw-ch32v003.c:37
#define GPIO_VAR_ENABLE_W1TS
Definition hdw-ch32v003.c:39
#define GPIO_VAR_W1TC
Definition hdw-ch32v003.c:36
#define DisableISR()
Definition hdw-ch32v003.c:21
int uprintf(const char *fmt,...)
vaprintf stand-in for USB logging.
Definition advanced_usb_control.c:118
#define GPIO_VAR_IN
Definition hdw-ch32v003.c:40